diff options
| author | Ivan Kosarev <ivan.kosarev@amd.com> | 2025-02-11 16:10:49 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-02-11 16:10:49 +0000 |
| commit | b7188f6313fef2d5a248e71ba6028460b2ac0558 (patch) | |
| tree | 48096599b8f858e0f94358a8edd2c89a954466c4 /llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | |
| parent | 5bf42d3e2e83344db14fc0e33623840c53cebfc4 (diff) | |
[AMDGPU][NFC] Remove an unneeded return value. (#126739)
And rename the function to disassociate it from the one where generating
loading of the input value may actually fail.
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index e9e47eaadd55..908d323c7fec 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -4275,10 +4275,11 @@ verifyCFIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI, MachineInstr *&Br, return UseMI; } -bool AMDGPULegalizerInfo::loadInputValue(Register DstReg, MachineIRBuilder &B, - const ArgDescriptor *Arg, - const TargetRegisterClass *ArgRC, - LLT ArgTy) const { +void AMDGPULegalizerInfo::buildLoadInputValue(Register DstReg, + MachineIRBuilder &B, + const ArgDescriptor *Arg, + const TargetRegisterClass *ArgRC, + LLT ArgTy) const { MCRegister SrcReg = Arg->getRegister(); assert(SrcReg.isPhysical() && "Physical register expected"); assert(DstReg.isVirtual() && "Virtual register expected"); @@ -4304,8 +4305,6 @@ bool AMDGPULegalizerInfo::loadInputValue(Register DstReg, MachineIRBuilder &B, } else { B.buildCopy(DstReg, LiveIn); } - - return true; } bool AMDGPULegalizerInfo::loadInputValue( @@ -4369,7 +4368,8 @@ bool AMDGPULegalizerInfo::loadInputValue( if (!Arg->isRegister() || !Arg->getRegister().isValid()) return false; // TODO: Handle these - return loadInputValue(DstReg, B, Arg, ArgRC, ArgTy); + buildLoadInputValue(DstReg, B, Arg, ArgRC, ArgTy); + return true; } bool AMDGPULegalizerInfo::legalizePreloadedArgIntrin( |
