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authorPierre van Houtryve <pierre.vanhoutryve@amd.com>2025-05-16 10:31:03 +0200
committerGitHub <noreply@github.com>2025-05-16 10:31:03 +0200
commitaacebaeab5448b4ef614aa8aca52ca210e451f79 (patch)
tree140211e8c660b789482901537142a2d773baed87 /llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
parent5e7bc5e080fb393c3ddb954fa9fd3714284f72c2 (diff)
[AMDGPU] Do not promote uniform i16 operations to i32 in CGP (#140208)
For the majority of cases, this is a neutral or positive change. There are even testcases that greatly benefit from it, but some regressions are possible. There is #140040 for GlobalISel that'd need to be fixed but it's only a one instruction regression and I think it can be fixed later. Solves #64591
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
index efb2894aaf64..70e80f9fe14e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
@@ -47,10 +47,10 @@ static cl::opt<bool> WidenLoads(
cl::init(false));
static cl::opt<bool> Widen16BitOps(
- "amdgpu-codegenprepare-widen-16-bit-ops",
- cl::desc("Widen uniform 16-bit instructions to 32-bit in AMDGPUCodeGenPrepare"),
- cl::ReallyHidden,
- cl::init(true));
+ "amdgpu-codegenprepare-widen-16-bit-ops",
+ cl::desc(
+ "Widen uniform 16-bit instructions to 32-bit in AMDGPUCodeGenPrepare"),
+ cl::ReallyHidden, cl::init(false));
static cl::opt<bool>
BreakLargePHIs("amdgpu-codegenprepare-break-large-phis",