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authorAkshay Khadse <akshayskhadse@gmail.com>2023-04-23 12:06:54 +0800
committerAkshay Khadse <akshayskhadse@gmail.com>2023-04-23 12:07:11 +0800
commit22b23a5213b57ce1834f5b50fbbf8a50297efc8a (patch)
tree6c87c14a58ce84a2afb9698b79372ae0ae8200c1 /llvm/lib/CodeGen/ScheduleDAG.cpp
parentd28018709375808ea147e66d96af1e81fd9fe8a6 (diff)
[Coverity] Fix explicit null dereferences
This change fixes static code analysis errors Reviewed By: skan Differential Revision: https://reviews.llvm.org/D148912
Diffstat (limited to 'llvm/lib/CodeGen/ScheduleDAG.cpp')
-rw-r--r--llvm/lib/CodeGen/ScheduleDAG.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/ScheduleDAG.cpp b/llvm/lib/CodeGen/ScheduleDAG.cpp
index ef886ad14649..14ec41920e3e 100644
--- a/llvm/lib/CodeGen/ScheduleDAG.cpp
+++ b/llvm/lib/CodeGen/ScheduleDAG.cpp
@@ -724,6 +724,8 @@ void ScheduleDAGTopologicalSort::AddSUnitWithoutPredecessors(const SUnit *SU) {
bool ScheduleDAGTopologicalSort::IsReachable(const SUnit *SU,
const SUnit *TargetSU) {
+ assert(TargetSU != nullptr && "Invalid target SUnit");
+ assert(SU != nullptr && "Invalid SUnit");
FixOrder();
// If insertion of the edge SU->TargetSU would create a cycle
// then there is a path from TargetSU to SU.