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authorCraig Topper <craig.topper@sifive.com>2025-01-30 00:14:08 -0800
committerGitHub <noreply@github.com>2025-01-30 00:14:08 -0800
commit473953a15fcf68f2a213e2fed7b47a2a690baff2 (patch)
tree08825996f2373909f53014fd2afcb885d1289d6e /llvm/lib/CodeGen/RegAllocFast.cpp
parentb8d4ba674b6027891610bd3157ed79d01bd72cd3 (diff)
[CodeGen] Use non-static Register::virtRegIndex() instead of static Register::virtReg2Index. NFC (#125031)
These are the the ones where we already had a Register object being used. Some places are still using unsigned which I did not convert.
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocFast.cpp')
-rw-r--r--llvm/lib/CodeGen/RegAllocFast.cpp22
1 files changed, 10 insertions, 12 deletions
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index e2309b65cf9a..14128dafbe4e 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -207,9 +207,7 @@ private:
explicit LiveReg(Register VirtReg) : VirtReg(VirtReg) {}
- unsigned getSparseSetIndex() const {
- return Register::virtReg2Index(VirtReg);
- }
+ unsigned getSparseSetIndex() const { return VirtReg.virtRegIndex(); }
};
using LiveRegMap = SparseSet<LiveReg, identity<unsigned>, uint16_t>;
@@ -349,11 +347,11 @@ private:
unsigned calcSpillCost(MCPhysReg PhysReg) const;
LiveRegMap::iterator findLiveVirtReg(Register VirtReg) {
- return LiveVirtRegs.find(Register::virtReg2Index(VirtReg));
+ return LiveVirtRegs.find(VirtReg.virtRegIndex());
}
LiveRegMap::const_iterator findLiveVirtReg(Register VirtReg) const {
- return LiveVirtRegs.find(Register::virtReg2Index(VirtReg));
+ return LiveVirtRegs.find(VirtReg.virtRegIndex());
}
void assignVirtToPhysReg(MachineInstr &MI, LiveReg &, MCPhysReg PhysReg);
@@ -493,7 +491,7 @@ static bool dominates(InstrPosIndexes &PosIndexes, const MachineInstr &A,
/// Returns false if \p VirtReg is known to not live out of the current block.
bool RegAllocFastImpl::mayLiveOut(Register VirtReg) {
- if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg))) {
+ if (MayLiveAcrossBlocks.test(VirtReg.virtRegIndex())) {
// Cannot be live-out if there are no successors.
return !MBB->succ_empty();
}
@@ -506,7 +504,7 @@ bool RegAllocFastImpl::mayLiveOut(Register VirtReg) {
// Find the first def in the self loop MBB.
for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) {
if (DefInst.getParent() != MBB) {
- MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg));
+ MayLiveAcrossBlocks.set(VirtReg.virtRegIndex());
return true;
} else {
if (!SelfLoopDef || dominates(PosIndexes, DefInst, *SelfLoopDef))
@@ -514,7 +512,7 @@ bool RegAllocFastImpl::mayLiveOut(Register VirtReg) {
}
}
if (!SelfLoopDef) {
- MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg));
+ MayLiveAcrossBlocks.set(VirtReg.virtRegIndex());
return true;
}
}
@@ -525,7 +523,7 @@ bool RegAllocFastImpl::mayLiveOut(Register VirtReg) {
unsigned C = 0;
for (const MachineInstr &UseInst : MRI->use_nodbg_instructions(VirtReg)) {
if (UseInst.getParent() != MBB || ++C >= Limit) {
- MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg));
+ MayLiveAcrossBlocks.set(VirtReg.virtRegIndex());
// Cannot be live-out if there are no successors.
return !MBB->succ_empty();
}
@@ -535,7 +533,7 @@ bool RegAllocFastImpl::mayLiveOut(Register VirtReg) {
// value inside a self looping block.
if (SelfLoopDef == &UseInst ||
!dominates(PosIndexes, *SelfLoopDef, UseInst)) {
- MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg));
+ MayLiveAcrossBlocks.set(VirtReg.virtRegIndex());
return true;
}
}
@@ -546,7 +544,7 @@ bool RegAllocFastImpl::mayLiveOut(Register VirtReg) {
/// Returns false if \p VirtReg is known to not be live into the current block.
bool RegAllocFastImpl::mayLiveIn(Register VirtReg) {
- if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg)))
+ if (MayLiveAcrossBlocks.test(VirtReg.virtRegIndex()))
return !MBB->pred_empty();
// See if the first \p Limit def of the register are all in the current block.
@@ -554,7 +552,7 @@ bool RegAllocFastImpl::mayLiveIn(Register VirtReg) {
unsigned C = 0;
for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) {
if (DefInst.getParent() != MBB || ++C >= Limit) {
- MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg));
+ MayLiveAcrossBlocks.set(VirtReg.virtRegIndex());
return !MBB->pred_empty();
}
}