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| author | Craig Topper <craig.topper@sifive.com> | 2023-01-13 14:38:08 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2023-01-13 14:38:08 -0800 |
| commit | e72ca520bb4806d4003ef69698089fd83a5777cb (patch) | |
| tree | d0ae50a1b48efe90bce1b4398ceb3cad1e33f7b3 /llvm/lib/CodeGen/OptimizePHIs.cpp | |
| parent | 2ca4b4f82e993d31c67a0e595ca584f860cd6811 (diff) | |
[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D141715
Diffstat (limited to 'llvm/lib/CodeGen/OptimizePHIs.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/OptimizePHIs.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/OptimizePHIs.cpp b/llvm/lib/CodeGen/OptimizePHIs.cpp index d5d262e4047a..e68a6398cf51 100644 --- a/llvm/lib/CodeGen/OptimizePHIs.cpp +++ b/llvm/lib/CodeGen/OptimizePHIs.cpp @@ -117,7 +117,7 @@ bool OptimizePHIs::IsSingleValuePHICycle(MachineInstr *MI, // Skip over register-to-register moves. if (SrcMI && SrcMI->isCopy() && !SrcMI->getOperand(0).getSubReg() && !SrcMI->getOperand(1).getSubReg() && - Register::isVirtualRegister(SrcMI->getOperand(1).getReg())) { + SrcMI->getOperand(1).getReg().isVirtual()) { SrcReg = SrcMI->getOperand(1).getReg(); SrcMI = MRI->getVRegDef(SrcReg); } @@ -142,8 +142,7 @@ bool OptimizePHIs::IsSingleValuePHICycle(MachineInstr *MI, bool OptimizePHIs::IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle) { assert(MI->isPHI() && "IsDeadPHICycle expects a PHI instruction"); Register DstReg = MI->getOperand(0).getReg(); - assert(Register::isVirtualRegister(DstReg) && - "PHI destination is not a virtual register"); + assert(DstReg.isVirtual() && "PHI destination is not a virtual register"); // See if we already saw this register. if (!PHIsInCycle.insert(MI).second) |