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authorDavid Spickett <david.spickett@linaro.org>2020-05-06 10:13:20 +0100
committerDavid Spickett <david.spickett@linaro.org>2020-05-06 10:14:17 +0100
commite1022cb5d4065aee8f5b747aac58e2cbf58c45a4 (patch)
treebcd58f916e9ba6252831ae5e9afd04cf14297f17 /llvm/lib/CodeGen/CallingConvLower.cpp
parentcf5ed6dc59ec8e416cca91c8145b1f09d891f130 (diff)
Revert "[CodeGen] Make logic of CCState::resultsCompatible clearer"
This reverts commit d782d1f898eaafee49548d5332e84c3ae11ebac4 which caused test CodeGen/X86/sibcall.ll to fail.
Diffstat (limited to 'llvm/lib/CodeGen/CallingConvLower.cpp')
-rw-r--r--llvm/lib/CodeGen/CallingConvLower.cpp18
1 files changed, 11 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/CallingConvLower.cpp b/llvm/lib/CodeGen/CallingConvLower.cpp
index cffee266ca71..12c4f1b6a219 100644
--- a/llvm/lib/CodeGen/CallingConvLower.cpp
+++ b/llvm/lib/CodeGen/CallingConvLower.cpp
@@ -276,14 +276,18 @@ bool CCState::resultsCompatible(CallingConv::ID CalleeCC,
for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
const CCValAssign &Loc1 = RVLocs1[I];
const CCValAssign &Loc2 = RVLocs2[I];
-
- if ( // Must both be in registers, or both in memory
- Loc1.isRegLoc() != Loc2.isRegLoc() ||
- // Must fill the same part of their locations
- Loc1.getLocInfo() != Loc2.getLocInfo() ||
- // Memory offset/register number must be the same
- Loc1.getExtraInfo() != Loc1.getExtraInfo())
+ if (Loc1.getLocInfo() != Loc2.getLocInfo())
+ return false;
+ bool RegLoc1 = Loc1.isRegLoc();
+ if (RegLoc1 != Loc2.isRegLoc())
return false;
+ if (RegLoc1) {
+ if (Loc1.getLocReg() != Loc2.getLocReg())
+ return false;
+ } else {
+ if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset())
+ return false;
+ }
}
return true;
}