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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-29 20:26:09 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-29 20:26:09 +0000 |
| commit | 51726e214754cfe8606d7f5906b2b638e0f0f19b (patch) | |
| tree | a6fa460b0e534c3684436c1553a77c0f856b6cac /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 3566477679b4873c63f0b81a77af8749646f71e4 (diff) | |
ARM SRS instruction parsing, diassembly and encoding support.
Fix the instruction encoding for operands. Refactor mode to use explicit
instruction definitions per FIXME to be more consistent with loads/stores.
Fix disassembler accordingly. Add tests.
llvm-svn: 136509
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions