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| author | Peter Waller <peter.waller@arm.com> | 2021-05-13 14:44:53 +0000 |
|---|---|---|
| committer | Peter Waller <peter.waller@arm.com> | 2021-05-19 13:50:13 +0100 |
| commit | fd4ef793ea54e5730838998863fea5484fcba541 (patch) | |
| tree | c7e62732a795a44597261546fe20245cfcea1dcc /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 6825bfe23e3829c81574e7d5d41887ca2dae4bef (diff) | |
[llvm][AArch64][SVE] Model FFR-using intrinsics with inaccessiblemem
Intriniscs reading or writing the FFR register need to model the fact
there is additional state being read/wrtten.
Model this state as inaccessible memory.
* setffr => write inaccessiblememonly
* rdffr => read inaccessiblememonly
* ldff* => read arg memory, write inaccessiblemem
* ldnf => read arg memory, write inaccessiblemem
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions