diff options
| author | Phoebe Wang <phoebe.wang@intel.com> | 2024-05-03 09:31:27 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-05-03 09:31:27 +0800 |
| commit | fd3e7e3a1e661482f46cd0347d0fa62adef30177 (patch) | |
| tree | e1d7dbbd2112d5031a75101a3c2a0c46466fe16e /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 1949856126df50c0ea4ee2f507d24613bd54824a (diff) | |
[X86] Adding lowerings for vector ISD::LRINT and ISD::LLRINT (#90065)
- [V]CVTP[D,S]2DQ supports `f64/f32` -> `i32` conversions that can be
mapped to `llvm.lrint.vNi32.vNf64/32` since SSE2. AVX and AVX512 added
256-bit and 512-bit support;
- VCVTP[D,S]2QQ supports `f64/f32` -> `i64` conversions that can be
mapped to `llvm.l[l]rint.vNi64.vNf64/32` since AVX512DQ. All 128-bit,
256-bit (require AVX512VL) and 512-bit are supported.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions