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| author | Sam Tebbs <samuel.tebbs@arm.com> | 2024-04-09 16:17:27 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-04-09 16:17:27 +0100 |
| commit | fb8dbd1fb67ef4d1417f279df7f9a99b29468527 (patch) | |
| tree | 646680a8927fbc17135f70559bd4608006d0091c /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | c8917048e3aa2be03b6588b817730abdbce23c85 (diff) | |
[AArch64] Remove copy in SVE/SME predicate spill and fill (#81716)
7dc20ab introduced an extra COPY when spilling and filling a PNR
register, which can't be elided as the input (PNR predicate) and output
(PPR predicate) register classes differ. The patch adds a new register
class that covers both PPR and PNR so that STR_PXI and LDR_PXI can
take either of them, removing the need for the copy.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions