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| author | Aart Bik <ajcbik@google.com> | 2020-09-28 12:56:10 -0700 |
|---|---|---|
| committer | Aart Bik <ajcbik@google.com> | 2020-09-28 13:38:03 -0700 |
| commit | e9628955f5e965b0a60b8df3c731fc6bfa87ad20 (patch) | |
| tree | 0d6cc740418106f66e61b595255703503a3d8f5a /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 288c5776c9d3cb14abe1c86f961c8ff166772d28 (diff) | |
[mlir] [VectorOps] Relaxed restrictions on vector.reduction types even more
Recently, restrictions on vector reductions were made more relaxed by
accepting any width signless integer and floating-point. This CL relaxes
the restriction even more by including unsigned and signed integers.
Reviewed By: bkramer
Differential Revision: https://reviews.llvm.org/D88442
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions