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| author | Ben Shi <powerman1st@163.com> | 2021-10-05 12:28:36 +0000 |
|---|---|---|
| committer | Ben Shi <ben.shi@streamcomputing.com> | 2021-11-08 02:58:25 +0000 |
| commit | e32cf690dfdcf41255022c075beac20c141e1419 (patch) | |
| tree | 6a26186555c510ff5f2f05b95bbd129f70f8e760 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 7c6f5950f08d41017536575152fb765ba85a09a1 (diff) | |
[RISCV] Optimize (add (mul r, c0), c1)
Optimize (add (mul x, c0), c1) ->
(add (mul (add x, c1/c0+1), c0), c1%c0-c0),
if c1/c0+1 and c1%c0-c0 are simm12, while c1 is not.
Optimize (add (mul x, c0), c1) ->
(add (mul (add x, c1/c0-1), c0), c1%c0+c0),
if c1/c0-1 and c1%c0+c0 are simm12, while c1 is not.
Reviewed By: craig.topper, asb
Differential Revision: https://reviews.llvm.org/D111141
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions