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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-11-13 11:13:30 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-11-13 11:13:30 +0000 |
| commit | e19cb9c57fea7981c206fcbaf9807870de6001a0 (patch) | |
| tree | 0f5ed90b68e85d2dd2e0dd948cd1dd04544600e6 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 4e0d2f8e6f140573fbe527b65be99f3347b94155 (diff) | |
[X86] Cleanup CVTPD2PS schedule values
The znver1/znver2 schedules for CVTPD2PS were incorrectly double pumping the xmm-load variant instead of the ymm variants (znver1 only)
Also, the xmm-load variant was incorrectly using FP03 instead of just FP3
Confirmed by the AMD SoG 17h tables, Agner + uops.info
Another step towards removing a lot of unnecessary overrides from all the x86 scheduler models - these should hopefully be convertible into regular WriteCvtPD2I classes soon.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions