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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2023-10-29 15:38:46 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2023-10-29 15:38:46 +0000 |
| commit | d96529af3c362c53ef2e8c883a9e571fb3626927 (patch) | |
| tree | 19c5d927f9bc52409d0fe10b0d2dca62c649c277 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 3f64c0fc48c5b2efc5b9ba11351647d515f23418 (diff) | |
[DAG] Attempt shl narrowing in SimplifyDemandedBits (REAPPLIED)
If a shl node leaves the upper half bits zero / undemanded, then see if we can profitably perform this with a half-width shl and a free trunc/zext.
Followup to D146121
Reapplied - moved after the ShrinkDemandedOp call; reuse the existing KnownBits result; ensure that we only attempt this if all the upper bits are demanded; 547dc461225ba should address the remaining regressions that were noticed in the previous commit.
Differential Revision: https://reviews.llvm.org/D155472
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions