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| author | Ethan Stewart <ethan.stewart@amd.com> | 2021-12-13 16:30:54 -0600 |
|---|---|---|
| committer | Ethan Stewart <ethan.stewart@amd.com> | 2021-12-13 16:31:24 -0600 |
| commit | d1327f8a574a0936f462387778adf0dfc14358f6 (patch) | |
| tree | 16ee8fd38d1dadeb56c6153980f95e41fea6da6e /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 2de9338587ffbad3a3f6249a615ab6c9e003813e (diff) | |
[clang][amdgpu] - Choose when to promote VarDecl to address space 4.
There are instances where clang codegen creates stores to
address space 4 in ctors, which causes a crash in llc.
This store was being optimized out at opt levels > 0.
For example:
pragma omp declare target
static const double log_smallx = log2(smallx);
pragma omp end declare target
This patch ensures that any global const that does not
have constant initialization stays in address space 1.
Note - a second patch is in the works where all global
constants are placed in address space 1 during
codegen and then the opt pass InferAdressSpaces
will promote to address space 4 where necessary.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D115661
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions
