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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2020-07-08 18:17:03 +0200 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2020-07-08 18:20:24 +0200 |
| commit | cca8578efab096fddcb0134b28b17f4758e9afa0 (patch) | |
| tree | ac4906ad0c67dc302635f390f4a53def2b173ba8 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 3fa989d4fd6b854209ba4e950d96b91d6d5797b4 (diff) | |
[SystemZ] Allow specifying integer registers as part of the address calculation
Revision e1de2773a534957305d7a559c6d88c4b5ac354e2 provided support for
accepting integer registers in inline asm i.e.
__asm("lhi %r0, 5") -> lhi %r0, 5
__asm("lhi 0, 5") -> lhi 0,5
This patch aims to extend this support to instructions which compute
addresses as well. (i.e instructions of type BDMem and BD[X|R|V|L]Mem)
Author: anirudhp
Differential Revision: https://reviews.llvm.org/D83251
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions