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authorSimon Tatham <simon.tatham@arm.com>2020-02-17 17:05:13 +0000
committerSimon Tatham <simon.tatham@arm.com>2020-02-18 09:34:50 +0000
commitc8b3196e54308b0113d2a0888d13ccc92e3b7ccc (patch)
treecc1a82af6511867f964e1a514b82adc226fc71b5 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp
parentdf3ed6c0fe31094941e4cd814cdf924b63993c4e (diff)
[ARM,MVE] Add intrinsics for FP rounding operations.
Summary: This adds the unpredicated forms of six different MVE intrinsics which all round a vector of floating-point numbers to integer values, leaving them still in FP format, differing only in rounding mode and exception settings. Five of them map to existing target-independent intrinsics in LLVM IR, such as @llvm.trunc and @llvm.rint. The sixth, mapping to the `vrintn` instruction, is done by inventing a target-specific intrinsic. (`vrintn` behaves the same as `vrintx` in terms of the output value: the side effects on the FPSCR flags are the only difference between the two. But ACLE specifies separate user-callable intrinsics for the two, so the side effects matter enough to make sure we generate the right one of the two instructions in each case.) Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard Reviewed By: miyuki Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D74333
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
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