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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-07 17:38:00 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-07 17:38:00 +0000 |
| commit | c83b82363c6d19dbfc5d148438a274f1f85b9188 (patch) | |
| tree | 0d879265734d4e1ee800568b3cfbbb83422ba3d4 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | e88e2b99353fe50f7bcfe83436883a72f9fb8c54 (diff) | |
GlobalISel: Implement fewerElementsVector for shifts
Introduce a new function which handles instructions with multiple type
indices, but have the same number of vector elements.
Also legalize v2s16 shifts when applicable.
llvm-svn: 353432
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions