diff options
| author | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2021-10-22 07:20:05 -0400 |
|---|---|---|
| committer | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2021-10-30 07:20:45 -0400 |
| commit | aa2d3b59ce75a5808f2fe3f2010920c1e19711bf (patch) | |
| tree | 95fcc1df93b7d174c747c2337db27450b792efbf /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 01b3bd3992b4b79ef103558eccc49981e97be479 (diff) | |
GlobalISel/Utils: Use incoming regbank while constraining the superclasses
Register operands with superclasses can possibly have multiple regBanks
if they have different register types. The regBank ambiguity resolved
during regbankselect should be used to constrain the operand regclass
instead of obtaining one from the MCInstrDesc.
This is a prerequisite patch for D109300 that introduces allocatable AV_*
Superclasses for AMDGPU by combining both VGPRs and AGPRs and we want to
restrain the regclass to either A or V based on the incoming regbank.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D112323
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions