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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-11-25 19:00:33 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-11-25 19:02:17 +0000 |
| commit | a0156356296b54dc071405332a517695b1881bc1 (patch) | |
| tree | 910b28435c1ab6d4918f372c7efd21cf94388c2d /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 5654a3dd0add58984e2c3247c70946d2ae0175f6 (diff) | |
[Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns
This should handle the basic integer min/max handling - the HVX ops are still TODO.
This is some necessary cleanup work for min/max ops to eventually help us move the add/sub sat patterns into DAGCombine - D91876.
Differential Revision: https://reviews.llvm.org/D92112
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions