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| author | Jay Foad <jay.foad@amd.com> | 2021-03-19 12:34:37 +0000 |
|---|---|---|
| committer | Jay Foad <jay.foad@amd.com> | 2021-03-26 15:38:14 +0000 |
| commit | 9d08f276d79b59e3d1ad3db3db19077284524ca3 (patch) | |
| tree | f1b04394c6379818561d61823d0024577bc8aea1 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 69d01e0e4001573612b0de234a05d3d2580fc3b8 (diff) | |
[AMDGPU] Use reductions instead of scans in the atomic optimizer
If the result of an atomic operation is not used then it can be more
efficient to build a reduction across all lanes instead of a scan. Do
this for GFX10, where the permlanex16 instruction makes it viable. For
wave64 this saves a couple of dpp operations. For wave32 it saves one
readlane (which are generally bad for performance) and one dpp
operation.
Differential Revision: https://reviews.llvm.org/D98953
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions