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authorDaniel Sanders <daniel.sanders@imgtec.com>2014-06-11 15:48:00 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2014-06-11 15:48:00 +0000
commit8bb4c858bc9b82810b69846c3d5a51844a6de0ec (patch)
treecbe9bae2c6c96fa238af0b1ecce21a5d928d8b2c /llvm/lib/Bitcode/Reader/BitcodeReader.cpp
parentdfa54396520db5c8156e11feca94f975e1024d56 (diff)
[mips][mips64r6] Improve tests affected by the changes to multiplies and divides
Summary: MIPS32r6/MIPS64r6 support has not been added yet. inlineasm-cnstrnt-reg.ll: Explicitly specify the CPU since it will not work on MIPS32r6/MIPS64r6 when -integrated-as is the default. We can't change the mnemonic since the LO register is an implicit def of mtlo and MIPS32r6/MIPS64r6 has no instructions that use LO. 2008-08-01-AsmInline.ll: Explicitly specify the CPU since MIPS32r6/MIPS64r6 will correctly emit different code and this is a regression test. mips64instrs.ll and mips64muldiv.ll Check registers and the way the multiply is used in m1 divrem.ll Check registers and use multiple filecheck prefixes to limit redundancy Reviewers: vmedic, jkolek, zoran.jovanovic, matheusalmeida Reviewed By: matheusalmeida Subscribers: matheusalmeida Differential Revision: http://reviews.llvm.org/D3894 llvm-svn: 210656
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
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