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| author | Sanjay Patel <spatel@rotateright.com> | 2021-12-20 09:10:50 -0500 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2021-12-20 09:10:50 -0500 |
| commit | 892c731681df962064828334531f59d29eb8473a (patch) | |
| tree | e0130b54d9a58f46a6e9e0b0cb29151c92d949fc /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | fcaf290d0278bb83387e1a1d972c55e08b8c40e3 (diff) | |
[Support] improve known bits analysis for leading zeros of multiply
Instead of summing leading zeros on the input operands, multiply the
max possible values of those inputs and count the leading zeros of
the result. This can give us an extra zero bit (typically in cases
where one of the operands is a known constant).
This allows folding away the remaining 'add' ops in the motivating
bug (modeled in the PhaseOrdering IR test):
https://github.com/llvm/llvm-project/issues/48399
Fixes #48399
Differential Revision: https://reviews.llvm.org/D115969
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions