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| author | Luke Lau <luke@igalia.com> | 2024-05-08 12:33:01 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-05-08 12:33:01 +0800 |
| commit | 8296f061aafb844bf3b9b002b7791ade7a1d3006 (patch) | |
| tree | f9af722ebb72bb40542a5c8ade03e382c11ab5d2 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 0d93b01c3b1e2e543acec3f36db639b8b7b0b20d (diff) | |
[RISCV] Add invariants that registers always have definitions. NFC (#90587)
For vector merge operands, we check if it's a NoRegister beforehand so
any other register type should have a definition.
For VL operands, they don't get replaced with NoRegisters since they're
scalar and should also always have a definition, even if it's an
implicit_def.
All the definitions at this stage should also be unique, this will
change in #70549
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions