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| author | Nadav Rotem <nadav.rotem@intel.com> | 2011-09-18 10:39:32 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-09-18 10:39:32 +0000 |
| commit | 7ae11279e97173a24f0d9198061535ffb350f18c (patch) | |
| tree | efef11afcb91ebd9822bb974dcce9e9192d1ee2b /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 7aaa0aa7a70fbacf0c5b5613f4eb2caafc6fbf3d (diff) | |
When promoting integer vectors we often create ext-loads. This patch adds a
dag-combine optimization to implement the ext-load efficiently (using shuffles).
For example the type <4 x i8> is stored in memory as i32, but it needs to
find its way into a <4 x i32> register. Previously we scalarized the memory
access, now we use shuffles.
llvm-svn: 139995
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions