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| author | Changpeng Fang <changpeng.fang@gmail.com> | 2016-08-24 20:35:23 +0000 |
|---|---|---|
| committer | Changpeng Fang <changpeng.fang@gmail.com> | 2016-08-24 20:35:23 +0000 |
| commit | 75f0968b3965806cdbad375d17723c29a752fb2d (patch) | |
| tree | 048e9a4a3f42b8c559b20e63f56516b5da2efd1f /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 5f45722b036297388175ea34312b41ebb5bdb7ac (diff) | |
AMDGCN/SI: Implement readlane/readfirstlane intrinsics
Summary:
This patch implements readlane/readfirstlane intrinsics.
TODO: need to define a new register class to consider the case
that the source could be a vector register or M0.
Reviewed by:
arsenm and tstellarAMD
Differential Revision:
http://reviews.llvm.org/D22489
llvm-svn: 279660
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions