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| author | Sam Parker <sam.parker@arm.com> | 2019-01-10 08:36:33 +0000 |
|---|---|---|
| committer | Sam Parker <sam.parker@arm.com> | 2019-01-10 08:36:33 +0000 |
| commit | 72082214525a811e3526819a1c22a58aa51e18bf (patch) | |
| tree | fe3841731f7acc33104614fd4104695141e7e126 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 5d20eb240fd8f89bdf774eb94cac8c3ff1fceab3 (diff) | |
[ARM] Size reduce teq to eors
Add t2TEQrr to the map of instructions with can be reduced down into
a T1 instruction. This is a special case because TEQ just sets the
CPSR and doesn't write to a GPR, which is not the case for EOR. So,
we need to ensure that the EOR can write to the first operand.
Differential Revision: https://reviews.llvm.org/D56255
llvm-svn: 350801
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions