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| author | Philip Reames <preames@rivosinc.com> | 2022-12-15 08:26:25 -0800 |
|---|---|---|
| committer | Philip Reames <listmail@philipreames.com> | 2022-12-15 08:32:05 -0800 |
| commit | 695fdef0ef03eba1169e1c91bdefb24c60cb8ab8 (patch) | |
| tree | 905e3c65aff044b875f1b97a1a2ec6c60b9414c0 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 6210127bd6e1c01660fa4c222e5d73e7c439af64 (diff) | |
[RISCV] Bugfix for 90f91683 noticed in follow up work
I went to extend this locally, and then promptly tripped across a bug which is possible with the landed patch. The problematic case is:
vsetvli zero, 4, <some vtype>
vmv.x.s x1, v0
vsetvli a0, zero, <same type>
In this case, the naive rewrite - what I had implemented - would form:
vsetvli zero, zero, <same vtype>
vmv.x.s x1, v0
This is, amusingly, correct for the vmv.x.s, but is incorrect for the instructions which follow the sequence and probably rely on VL=VLMAX. (The VL before the sequence is unknown, and thus doesn't have to be VLMAX.)
I plan to rework the rewrite code to be more robust here, but I wanted to directly fix the bug first. Sorry for the lack of test; I didn't manage to reproduce this without an additional optimization change after a few minutes of trying.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions