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| author | Sanjay Patel <spatel@rotateright.com> | 2017-04-01 15:05:54 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-04-01 15:05:54 +0000 |
| commit | 665021e7ee2faad573840b7698ad1419aa2fcd92 (patch) | |
| tree | 0f9b6c9e2a6a5496d3a1fdeef3654a7bfb34c306 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | fe9340c1682dbce08e6bb1f8720ba89ec495f377 (diff) | |
[DAGCombiner] enable vector transforms for any/all {sign} bits set/clear
The code already allowed vector types in via "isInteger" (which might want
a more specific name), so use splat-friendly constant predicates to match
those types.
llvm-svn: 299304
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions