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| author | Matthias Braun <matze@braunis.de> | 2016-08-24 02:32:29 +0000 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2016-08-24 02:32:29 +0000 |
| commit | 3a133159cc2bda1212dd62112c7fc6146cb6f37a (patch) | |
| tree | 5dbdea76eaa3b07b84b86eae6fa3eb8a22693cc6 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 8702e4405707f56a67a71689d3101d3bbb8172df (diff) | |
TargetSchedule: Do not consider subregister definitions as reads.
We should not consider subregister definitions as reads for schedule
model purposes (they are just modeled as reads of the overal vreg for
liveness calculation purposes, the CPU instructions are not actually
reading).
Unfortunately I cannot submit a test for this as it requires a target
which uses ReadAdvance annotation in the scheduling model and has
subregister liveness enabled at the same time, which is only the case on
an out of tree target.
llvm-svn: 279604
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions