diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2021-05-23 22:50:45 +0100 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2021-05-24 09:48:32 +0100 |
| commit | 243e58868176102484c3ff1a338342633ede7361 (patch) | |
| tree | 0b2f3dd12abf9717052159e83a80a3ffa3d5bff6 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 486110eb413446dfa835d880bfd1c0d6bbe9f120 (diff) | |
[CostModel][X86] Improve accuracy of vXi64 MUL costs on AVX2/AVX512 targets
By llvm-mca analysis, Haswell/Broadwell has the worst v4i64 recip-throughput cost of the AVX2 targets at 6 (vs the currently used cost of 8). Similarly SkylakeServer (our only AVX512 target model) implements PMULLQ with an average cost of 1.5 (rounded up to 2.0), and the PMULUDQ-sequence (without AVX512DQ) as a cost of 6.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions