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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-16 23:21:55 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-16 23:21:55 +0000 |
| commit | 0ea1fce6b4c46b3874e96df4fe2bdf579cc212dd (patch) | |
| tree | 710c0cd062d535fc5129b7174d8bec7feba95879 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | c19bf0282de5a336de29aaecc29e8dad9c8906b2 (diff) | |
Add ADD and SUB to the predicable ARM instructions.
It is not my plan to duplicate the entire ARM instruction set with
predicated versions. We need a way of representing predicated
instructions in SSA form without requiring a separate opcode.
Then the pseudo-instructions can go away.
llvm-svn: 162061
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions
