summaryrefslogtreecommitdiff
path: root/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
diff options
context:
space:
mode:
authorPhilip Reames <preames@rivosinc.com>2024-11-27 10:58:09 -0800
committerPhilip Reames <listmail@philipreames.com>2024-11-27 11:14:51 -0800
commit06246b2952d5b061e8fd75979bac9c90ccd493a4 (patch)
tree8c04dec13be762ae78a54dd4ff145c59430009d2 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp
parent82b437944e53afeb25dd85507664e2a980ddfe07 (diff)
[RISCV] Add shrinkwrap test cases showing gaps in current impl
This covers multiple interactions reduced from larger workloads: 1) Rematerializing addi s0, x0, <imm> to avoid the need to spill a CSR, with the common user being a branch. (i.e. branch on immediate idioms) 2) Rematerializing addi s0, a0, <imm> to avoid the need to spill a CSR, with the common user being a vector load or store. (i.e. because we don't have (reg+imm) addressing on vector.) 3) Independent of the previous, we could still shrink wrap these by locally using a non-CSR, and deferring the move into csr into the non-shrink wrapped path. 4) Weirdly, MachineCSE is producing a different result when an edge is manually split. This edge split should be irrelevant to the CSE?
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions