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authorDavid Sherwood <david.sherwood@arm.com>2020-04-24 07:55:53 +0100
committerDavid Sherwood <david.sherwood@arm.com>2020-04-30 11:14:04 +0100
commit058cd8c5be1cb6c74c0cfc154a61ea859e1c8811 (patch)
treeb6a64ce10b79951f5f6986f9b6d31e3b411878b2 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp
parent7a3be975b92fece93e07bfc6451e9a39eb6f5142 (diff)
[CodeGen] Add support for inserting elements into scalable vectors
Summary: This patch tries to ensure that we do something sensible when generating code for the ISD::INSERT_VECTOR_ELT DAG node when operating on scalable vectors. Previously we always returned 'undef' when inserting an element into an out-of-bounds lane index, whereas now we only do this for fixed length vectors. For scalable vectors it is assumed that the backend will do the right thing in the same way that we have to deal with variable lane indices. In this patch I have permitted a few basic combinations for scalable vector types where it makes sense, but in general avoided most cases for now as they currently require the use of BUILD_VECTOR nodes. This patch includes tests for all scalable vector types when inserting into lane 0, but I've only included one or two vector types for other cases such as variable lane inserts. Differential Revision: https://reviews.llvm.org/D78992
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
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