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| author | David Green <david.green@arm.com> | 2021-01-27 10:38:32 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2021-01-27 10:38:32 +0000 |
| commit | 0175cd00a1af35aa90e49bf008a0d4d4cbc7fb89 (patch) | |
| tree | a2efb5ff08776a00da2d86617f8b06ce6e78164b /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 9a75a808c27f2d7a3ef4880be5f3febc97d5dcd2 (diff) | |
[AArch64] Add vector saturating add intrinsic costs
This adds sadd.sat, uadd.sat, ssub.sat and usub.sat costs for AArch64,
similar to how they were recently added for ARM.
Differential Revision: https://reviews.llvm.org/D95292
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions