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authorPaul Walker <paul.walker@arm.com>2024-08-30 11:37:25 +0100
committerGitHub <noreply@github.com>2024-08-30 11:37:25 +0100
commitfab925651685505906416dca48469fd9f69ba39a (patch)
tree4e99c3d36916721da97cdf19625c6cfe77219319 /llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
parentf0e34f381866b82a26241f7e9aa5964f0dd11ebd (diff)
[LLVM][AArch64] Fix invalid use of AArch64ISD::UZP2 in performConcatVectorsCombine. (#104774)
UZP2 requires both operands to match the result type but the combine tries to replace a truncate by passing the pre-truncated operands directly to an UZP2 with the truncated result type. This patch nop-casts the operands to keep the DAG consistent. There should be no changes to the generated code, which is fine as it. This patch also enables more target specific getNode() validation for fixed length vector types.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp')
0 files changed, 0 insertions, 0 deletions