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| author | Craig Topper <craig.topper@sifive.com> | 2024-06-13 17:35:23 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2024-06-13 18:12:25 -0700 |
| commit | cb021f5e46d259876ccf0aa24db48c10369f3d61 (patch) | |
| tree | 12c5c7e7171cbc06f60eaba268da721e36f1c65b /llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp | |
| parent | 50ead2ee93bf1b59f35d7afda553a026b87855bb (diff) | |
[RISCV] Don't use SEW=16 .vf instructions to move scalar bf16 into a vector.
The instructions are only defined to operator f16 data. If the
scalar FPR register isn't properly nan-boxed, these instructions
will create a fp16 nan not a bf16 nan in the vector register.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp')
0 files changed, 0 insertions, 0 deletions