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| author | Momchil Velikov <momchil.velikov@arm.com> | 2020-06-23 15:24:50 +0100 |
|---|---|---|
| committer | Momchil Velikov <momchil.velikov@arm.com> | 2020-06-23 16:04:23 +0100 |
| commit | adf7973fd35d899a1500d2f379b4e6874b4de20f (patch) | |
| tree | 8db7d3a0316251c1c92e7c18cfa2c5c6691ee459 /llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp | |
| parent | 510796d1a7c57376d0344a3ab4081115c8861913 (diff) | |
[ARM] Describe defs/uses of VLLDM and VLSTM
The VLLDM and VLSTM instructions are incompletely specified. They
(potentially) write (or read, respectively) registers Q0-Q7, VPR, and
FPSCR, but the compiler is unaware of it.
In the new test case `cmse-vlldm-no-reorder.ll` case the compiler
missed an anti-dependency and reordered a `VLLDM` ahead of the
instruction, which stashed the return value from the non-secure call,
effectively clobbering said value.
This test case does not fail with upstream LLVM, because of scheduling
differences and I couldn't find a test case for the VLSTM either.
Differential Revision: https://reviews.llvm.org/D81586
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp')
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