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| author | Sanjay Patel <spatel@rotateright.com> | 2016-08-10 19:00:11 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-08-10 19:00:11 +0000 |
| commit | 5ccc85fe83500cd9c54dd4dfb5fd3cad761d4830 (patch) | |
| tree | a1ac251dfaa52b69483d7c8e8956f88050acbed4 /lldb/unittests/ScriptInterpreter/Python/PythonDataObjectsTests.cpp | |
| parent | 498d3113c35d8d4f80e4d79ac9b75c3980bfc8c3 (diff) | |
[x86, AVX] allow FP vector select folding to bitwise logic ops (PR28895)
This handles the case in:
https://llvm.org/bugs/show_bug.cgi?id=28895
...but we are not getting all of the possibilities yet.
Eg, we use 'X86::FANDN' for scalar FP select combines.
That enhancement is filed as:
https://llvm.org/bugs/show_bug.cgi?id=28925
Differential Revision: https://reviews.llvm.org/D23337
llvm-svn: 278270
Diffstat (limited to 'lldb/unittests/ScriptInterpreter/Python/PythonDataObjectsTests.cpp')
0 files changed, 0 insertions, 0 deletions