summaryrefslogtreecommitdiff
path: root/lldb/test/API/python_api/thread/TestThreadAPI.py
diff options
context:
space:
mode:
authorDavid Green <david.green@arm.com>2023-02-08 13:17:10 +0000
committerDavid Green <david.green@arm.com>2023-02-08 13:17:10 +0000
commitb134c62facef01dabf901ee6a6283e3b0fb3a249 (patch)
tree6d77f49120c1c79e32f16f465612cc438ffec843 /lldb/test/API/python_api/thread/TestThreadAPI.py
parent22d98280dd8ee70064899eefb973a1c020605874 (diff)
[AArch64] Fix creation of invalid instructions with XZR register
A combination of GlobalISel and MachineCombiner can end up creating `SUB xrz, (MOVI -2105098)` instructions which have not been constant folded. The AArch64MIPeepholeOpt pass will then attempt to create `ADD xzr, 513, lsl 12`, which is not a valid instruction. This adds a bail out of the transform if the register is xzr/wzr. Fixes #60528 Differential Revision: https://reviews.llvm.org/D143475
Diffstat (limited to 'lldb/test/API/python_api/thread/TestThreadAPI.py')
0 files changed, 0 insertions, 0 deletions