diff options
| author | Hsiangkai Wang <kai.wang@sifive.com> | 2021-01-29 14:35:58 +0800 |
|---|---|---|
| committer | Hsiangkai Wang <kai.wang@sifive.com> | 2021-01-30 07:20:05 +0800 |
| commit | e08b67f3a8ada62dcf84d41929c208adc656ba92 (patch) | |
| tree | 3604bb3315c58fdf003145b2a710eb53a8bd6f2c /lldb/test/API/python_api/process/TestProcessAPI.py | |
| parent | 9dbe736cbd2c6a0c3d62a6fd6a2cf31c9ffc9577 (diff) | |
[NFC][RISCV] Remove redundant pseudo instructions for vector load/store.
Not all combinations of SEW and LMUL we need to support. For example, we
only need to support [M1, M2, M4, M8] for SEW = 64. There is no need to
define pseudos for PseudoVLSE64MF8, PseudoVLSE64MF4, and PseudoVLSE64MF2.
Differential Revision: https://reviews.llvm.org/D95667
Diffstat (limited to 'lldb/test/API/python_api/process/TestProcessAPI.py')
0 files changed, 0 insertions, 0 deletions