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authorDiego Caballero <diegocaballero@google.com>2024-02-21 09:22:48 -0800
committerGitHub <noreply@github.com>2024-02-21 09:22:48 -0800
commit71441ed1716e6ed3f053dea9c1ceb9cfe2822aea (patch)
treebef7a23b1ea244a8cdb30df8cec4fcb2ac92bf15 /lldb/test/API/python_api/process/TestProcessAPI.py
parent162fa4dd25d631d0ab7816ec6081bcaff951a23c (diff)
[mlir][Vector] Add vector bitwidth target to xfer op flattening (#81966)
This PR adds an optional bitwidth parameter to the vector xfer op flattening transformation so that the flattening doesn't happen if the trailing dimension of the read/writen vector is larger than this bitwidth (i.e., we are already able to fill at least one vector register with that size).
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