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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-02-10 16:16:16 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-02-10 16:16:56 +0000 |
| commit | 06617c452204e4b84c0f70407aa4ecd32d3b295f (patch) | |
| tree | dcf1dd63ae1c6a8802a5f157bcbd2f5857c2bb02 /lldb/test/API/python_api/module_section/TestModuleAndSection.py | |
| parent | 4b1df7356a15aee8c7fb36c601ac02eb8ccb011d (diff) | |
[X86] Add lowerShuffleAsBitRotate (PR44379)
As noted on PR44379, we didn't attempt to lower vector shuffles using bit rotations on XOP/AVX512F targets.
This patch lowers to uniform ISD:ROTL nodes - ROTR isn't supported by XOP and they are interchangeable for constant values anyway.
There might be cases where targets without ISD:ROTL support would benefit from this (expanding to SRL+SHL+OR), which I'll investigate in a future patch.
REAPPLIED rGe82e17d4d4ca after reversion at rG39eade73a567 - fixed offset matching in matchShuffleAsBitRotate.
Diffstat (limited to 'lldb/test/API/python_api/module_section/TestModuleAndSection.py')
0 files changed, 0 insertions, 0 deletions