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authorHugo Trachino <hugo.trachino@huawei.com>2024-05-20 20:46:41 +0100
committerGitHub <noreply@github.com>2024-05-20 21:46:41 +0200
commitfdd245ad856f85019bb408ed5c14984823e7077f (patch)
treeac078373ae164a841f255c53ef3d7f6444a3d785 /lldb/test/API/python_api/debugger
parente1c06c380ce01a4524df8061171e63cad010e4e6 (diff)
[MLIR][Vector] Implement transferXXPermutationLowering as MaskableOpRewritePattern (#91987)
* Implements `TransferWritePermutationLowering`, `TransferReadPermutationLowering` and `TransferWriteNonPermutationLowering` as a MaskableOpRewritePattern. Allowing to exit gracefully when such use of a xferOp is inside a `vector::MaskOp` * Updates MaskableOpRewritePattern to handle MemRefs and buffer semantics providing empty `Value()` as a return value for `matchAndRewriteMaskableOp` now represents successful rewriting without value to replace the original op. Split of https://github.com/llvm/llvm-project/pull/90835
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