diff options
| author | David Green <david.green@arm.com> | 2022-04-07 19:27:41 +0100 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2022-04-07 19:27:41 +0100 |
| commit | fa784f63827d046c1dad5cbdf2bb5eabaf456c75 (patch) | |
| tree | 62ac0228352faed2d304bee65f3509bce78c812b /lldb/test/API/functionalities/scripted_process/TestStackCoreScriptedProcess.py | |
| parent | a3f423cf575db92a699deb7d9e7e6918c51f4e4d (diff) | |
[AArch64] Insert subvector costs
An insert subvector under aarch64 can often be done as a single lane mov
operation. For example a v4i8 inserted into a v16i8 is a s-reg mov, so
long as the index is a multiple of 4. This teaches the cost model that,
using code copied over from the X86 backend.
Some of the costs (v16i16_4_0) are still high because they get matched
as a SK_Select, not an SK_InsertSubvector. D120879 has some codegen
tests for inserting subvectors, which I were added as
llvm/test/CodeGen/AArch64/insert-subvector.ll.
Differential Revision: https://reviews.llvm.org/D120880
Diffstat (limited to 'lldb/test/API/functionalities/scripted_process/TestStackCoreScriptedProcess.py')
0 files changed, 0 insertions, 0 deletions
