[RISCV] Incorporate scalar addends to extend vector multiply accumulate chains (#168660)

Previously, the following:
      %mul0 = mul nsw <8 x i32> %m00, %m01
      %mul1 = mul nsw <8 x i32> %m10, %m11
      %add0 = add <8 x i32> %mul0, splat (i32 32)
      %add1 = add <8 x i32> %add0, %mul1

    lowered to:
      vsetivli zero, 8, e32, m2, ta, ma
      vmul.vv v8, v8, v9
      vmacc.vv v8, v11, v10
      li a0, 32
      vadd.vx v8, v8, a0

    After this patch, now lowers to:
      li a0, 32
      vsetivli zero, 8, e32, m2, ta, ma
      vmv.v.x v12, a0
      vmadd.vv v8, v9, v12
      vmacc.vv v8, v11, v10

Modeled on 0cc981e0 from the AArch64 backend.

C-code for the example case (`clang -O3 -S -mcpu=sifive-x280`):
```
int madd_fail(int a, int b, int * restrict src, int * restrict dst, int loop_bound) {
  for (int i = 0; i < loop_bound; i += 2) {
    dst[i] = src[i] * a + src[i + 1] * b + 32;
  }
}
```

0 files changed, 0 insertions, 0 deletions