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authorDinar Temirbulatov <Dinar.Temirbulatov@arm.com>2023-11-08 14:37:49 +0000
committerGitHub <noreply@github.com>2023-11-08 14:37:49 +0000
commit3f9d385e5844f2f1f144305037cfc904789c6187 (patch)
treebbf58654e8b1875cc095c319e81bb86a2c023c79 /lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
parent9cdaeefc4542d889cc8aefbc7d7e69baa8675cd9 (diff)
[AArch64][SME] Shuffle lowering, assume that the minimal SVE register is 128-bit, when NOEN is not available. (#71647)
We can assume that the minimal SVE register is 128-bit, when NEON is not available. And we can lower the shuffle shuffle operation with one operand to TBL1 SVE instruction.
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