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authorJonas Devlieghere <jonas@devlieghere.com>2023-05-25 08:48:57 -0700
committerJonas Devlieghere <jonas@devlieghere.com>2023-05-25 12:54:09 -0700
commit2238dcc39358353cac21df75c3c3286ab20b8f53 (patch)
tree1bb7ec8d7405ccd7fdb5a8a78d0cf5ef40bcc963 /lldb/test/API/functionalities/plugins/python_os_plugin/operating_system2.py
parentdaeee56798c51e8f007e8e8e6e677a420b14c9ef (diff)
[NFC][Py Reformat] Reformat python files in lldb
This is an ongoing series of commits that are reformatting our Python code. Reformatting is done with `black` (23.1.0). If you end up having problems merging this commit because you have made changes to a python file, the best way to handle that is to run `git checkout --ours <yourfile>` and then reformat it with black. RFC: https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style Differential revision: https://reviews.llvm.org/D151460
Diffstat (limited to 'lldb/test/API/functionalities/plugins/python_os_plugin/operating_system2.py')
-rw-r--r--lldb/test/API/functionalities/plugins/python_os_plugin/operating_system2.py271
1 files changed, 236 insertions, 35 deletions
diff --git a/lldb/test/API/functionalities/plugins/python_os_plugin/operating_system2.py b/lldb/test/API/functionalities/plugins/python_os_plugin/operating_system2.py
index 26864bbc6aa3..3ba68e40cb80 100644
--- a/lldb/test/API/functionalities/plugins/python_os_plugin/operating_system2.py
+++ b/lldb/test/API/functionalities/plugins/python_os_plugin/operating_system2.py
@@ -8,10 +8,10 @@ class OperatingSystemPlugIn(object):
"""Class that provides data for an instance of a LLDB 'OperatingSystemPython' plug-in class"""
def __init__(self, process):
- '''Initialization needs a valid.SBProcess object.
+ """Initialization needs a valid.SBProcess object.
This plug-in will get created after a live process is valid and has stopped for the
- first time.'''
+ first time."""
self.process = None
self.registers = None
self.threads = None
@@ -28,11 +28,12 @@ class OperatingSystemPlugIn(object):
def create_thread(self, tid, context):
if tid == 0x444444444:
thread_info = {
- 'tid': tid,
- 'name': 'four',
- 'queue': 'queue4',
- 'state': 'stopped',
- 'stop_reason': 'none'}
+ "tid": tid,
+ "name": "four",
+ "queue": "queue4",
+ "state": "stopped",
+ "stop_reason": "none",
+ }
self.threads.append(thread_info)
return thread_info
return None
@@ -56,43 +57,242 @@ class OperatingSystemPlugIn(object):
# in memory. Don't specify this if your register layout in memory doesn't match the layout
# described by the dictionary returned from a call to the
# get_register_info() method.
- self.threads = [
- {'tid': 0x111111111, 'core': 0}
- ]
+ self.threads = [{"tid": 0x111111111, "core": 0}]
return self.threads
def get_register_info(self):
if self.registers is None:
self.registers = dict()
- self.registers['sets'] = ['GPR']
- self.registers['registers'] = [
- {'name': 'rax', 'bitsize': 64, 'offset': 0, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 0, 'dwarf': 0},
- {'name': 'rbx', 'bitsize': 64, 'offset': 8, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 3, 'dwarf': 3},
- {'name': 'rcx', 'bitsize': 64, 'offset': 16, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 2, 'dwarf': 2, 'generic': 'arg4', 'alt-name': 'arg4', },
- {'name': 'rdx', 'bitsize': 64, 'offset': 24, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 1, 'dwarf': 1, 'generic': 'arg3', 'alt-name': 'arg3', },
- {'name': 'rdi', 'bitsize': 64, 'offset': 32, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 5, 'dwarf': 5, 'generic': 'arg1', 'alt-name': 'arg1', },
- {'name': 'rsi', 'bitsize': 64, 'offset': 40, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 4, 'dwarf': 4, 'generic': 'arg2', 'alt-name': 'arg2', },
- {'name': 'rbp', 'bitsize': 64, 'offset': 48, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 6, 'dwarf': 6, 'generic': 'fp', 'alt-name': 'fp', },
- {'name': 'rsp', 'bitsize': 64, 'offset': 56, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 7, 'dwarf': 7, 'generic': 'sp', 'alt-name': 'sp', },
- {'name': 'r8', 'bitsize': 64, 'offset': 64, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 8, 'dwarf': 8, 'generic': 'arg5', 'alt-name': 'arg5', },
- {'name': 'r9', 'bitsize': 64, 'offset': 72, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 9, 'dwarf': 9, 'generic': 'arg6', 'alt-name': 'arg6', },
- {'name': 'r10', 'bitsize': 64, 'offset': 80, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 10, 'dwarf': 10},
- {'name': 'r11', 'bitsize': 64, 'offset': 88, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 11, 'dwarf': 11},
- {'name': 'r12', 'bitsize': 64, 'offset': 96, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 12, 'dwarf': 12},
- {'name': 'r13', 'bitsize': 64, 'offset': 104, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 13, 'dwarf': 13},
- {'name': 'r14', 'bitsize': 64, 'offset': 112, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 14, 'dwarf': 14},
- {'name': 'r15', 'bitsize': 64, 'offset': 120, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 15, 'dwarf': 15},
- {'name': 'rip', 'bitsize': 64, 'offset': 128, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'gcc': 16, 'dwarf': 16, 'generic': 'pc', 'alt-name': 'pc'},
- {'name': 'rflags', 'bitsize': 64, 'offset': 136, 'encoding': 'uint', 'format': 'hex', 'set': 0, 'generic': 'flags', 'alt-name': 'flags'},
- {'name': 'cs', 'bitsize': 64, 'offset': 144, 'encoding': 'uint', 'format': 'hex', 'set': 0},
- {'name': 'fs', 'bitsize': 64, 'offset': 152, 'encoding': 'uint', 'format': 'hex', 'set': 0},
- {'name': 'gs', 'bitsize': 64, 'offset': 160, 'encoding': 'uint', 'format': 'hex', 'set': 0},
+ self.registers["sets"] = ["GPR"]
+ self.registers["registers"] = [
+ {
+ "name": "rax",
+ "bitsize": 64,
+ "offset": 0,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 0,
+ "dwarf": 0,
+ },
+ {
+ "name": "rbx",
+ "bitsize": 64,
+ "offset": 8,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 3,
+ "dwarf": 3,
+ },
+ {
+ "name": "rcx",
+ "bitsize": 64,
+ "offset": 16,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 2,
+ "dwarf": 2,
+ "generic": "arg4",
+ "alt-name": "arg4",
+ },
+ {
+ "name": "rdx",
+ "bitsize": 64,
+ "offset": 24,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 1,
+ "dwarf": 1,
+ "generic": "arg3",
+ "alt-name": "arg3",
+ },
+ {
+ "name": "rdi",
+ "bitsize": 64,
+ "offset": 32,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 5,
+ "dwarf": 5,
+ "generic": "arg1",
+ "alt-name": "arg1",
+ },
+ {
+ "name": "rsi",
+ "bitsize": 64,
+ "offset": 40,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 4,
+ "dwarf": 4,
+ "generic": "arg2",
+ "alt-name": "arg2",
+ },
+ {
+ "name": "rbp",
+ "bitsize": 64,
+ "offset": 48,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 6,
+ "dwarf": 6,
+ "generic": "fp",
+ "alt-name": "fp",
+ },
+ {
+ "name": "rsp",
+ "bitsize": 64,
+ "offset": 56,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 7,
+ "dwarf": 7,
+ "generic": "sp",
+ "alt-name": "sp",
+ },
+ {
+ "name": "r8",
+ "bitsize": 64,
+ "offset": 64,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 8,
+ "dwarf": 8,
+ "generic": "arg5",
+ "alt-name": "arg5",
+ },
+ {
+ "name": "r9",
+ "bitsize": 64,
+ "offset": 72,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 9,
+ "dwarf": 9,
+ "generic": "arg6",
+ "alt-name": "arg6",
+ },
+ {
+ "name": "r10",
+ "bitsize": 64,
+ "offset": 80,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 10,
+ "dwarf": 10,
+ },
+ {
+ "name": "r11",
+ "bitsize": 64,
+ "offset": 88,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 11,
+ "dwarf": 11,
+ },
+ {
+ "name": "r12",
+ "bitsize": 64,
+ "offset": 96,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 12,
+ "dwarf": 12,
+ },
+ {
+ "name": "r13",
+ "bitsize": 64,
+ "offset": 104,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 13,
+ "dwarf": 13,
+ },
+ {
+ "name": "r14",
+ "bitsize": 64,
+ "offset": 112,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 14,
+ "dwarf": 14,
+ },
+ {
+ "name": "r15",
+ "bitsize": 64,
+ "offset": 120,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 15,
+ "dwarf": 15,
+ },
+ {
+ "name": "rip",
+ "bitsize": 64,
+ "offset": 128,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "gcc": 16,
+ "dwarf": 16,
+ "generic": "pc",
+ "alt-name": "pc",
+ },
+ {
+ "name": "rflags",
+ "bitsize": 64,
+ "offset": 136,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ "generic": "flags",
+ "alt-name": "flags",
+ },
+ {
+ "name": "cs",
+ "bitsize": 64,
+ "offset": 144,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ },
+ {
+ "name": "fs",
+ "bitsize": 64,
+ "offset": 152,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ },
+ {
+ "name": "gs",
+ "bitsize": 64,
+ "offset": 160,
+ "encoding": "uint",
+ "format": "hex",
+ "set": 0,
+ },
]
return self.registers
def get_register_data(self, tid):
return struct.pack(
- '21Q',
+ "21Q",
tid + 1,
tid + 2,
tid + 3,
@@ -113,4 +313,5 @@ class OperatingSystemPlugIn(object):
tid + 18,
tid + 19,
tid + 20,
- tid + 21)
+ tid + 21,
+ )