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| author | Artur Bialas <artur.bialas@intel.com> | 2020-11-05 08:26:15 +0100 |
|---|---|---|
| committer | Artur Bialas <artur.bialas@intel.com> | 2020-11-05 08:26:15 +0100 |
| commit | 1938b61bda50f0117e6b8bbc02e42d065d59b4f9 (patch) | |
| tree | 62a44fcd1b8ac8af6c31787baf4d7518c50739d4 /lldb/test/API/functionalities/plugins/python_os_plugin/TestPythonOSPlugin.py | |
| parent | 5fd3193c88d82f04571897a9b9d8a49a9f491d88 (diff) | |
[mlir][spirv] Allow usage of vector size 8 and 16 with Vector16 capability
Per spec, vector sizes 8 and 16 are allowed when Vector16 capability is present.
This change expands the limitation of vector sizes to accept these sizes.
Differential Revision: https://reviews.llvm.org/D90683
Diffstat (limited to 'lldb/test/API/functionalities/plugins/python_os_plugin/TestPythonOSPlugin.py')
0 files changed, 0 insertions, 0 deletions