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authorDavid Spickett <david.spickett@linaro.org>2022-09-12 13:10:02 +0000
committerDavid Spickett <david.spickett@linaro.org>2022-09-13 10:13:06 +0000
commit0b8a44388ec59abe8e91c5ead535f2f8de0f05f8 (patch)
treebd6c6fec5c534512ab6eeb1868bc4fd811cd0e3e /lldb/test/API/functionalities/module_cache/universal/TestModuleCacheUniversal.py
parent3743f9afeb51e0b7bdf2269583f32b7e35369168 (diff)
[llvm][AArch64] Explain why certain registers are reserved on Arm64EC
This extends 4658366d95d5e398baad956225cc4ba339d5b037 to add a note explaining why the register is reserved. note: x13 is clobbered by asynchronous signals when using Arm64EC. I've added testing for w/x registers and v/q/s/d and h floating point registers. llvm will accept, but silently do nothing with, b registers. So they are not tested here (clang rejects them so at least for C you're safe anyway). Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D133701
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